ComfyUI Node: XY Input: Sampler/Scheduler

Authored by jags111

Created about a year ago

Updated 2 months ago

941 stars

Category

Efficiency Nodes/XY Inputs

Inputs

target_parameter

• sampler
• scheduler
• sampler & scheduler

input_count INT

sampler_1

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_1

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_2

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_2

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_3

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_3

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_4

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_4

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_5

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_5

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_6

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_6

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_7

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_7

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_8

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_8

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_9

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_9

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_10

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_10

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_11

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_11

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_12

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_12

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_13

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_13

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_14

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_14

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_15

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_15

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_16

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_16

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_17

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_17

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_18

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_18

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_19

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_19

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_20

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_20

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_21

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_21

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_22

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_22

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_23

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_23

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_24

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_24

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_25

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_25

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_26

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_26

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_27

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_27

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_28

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_28

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_29

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_29

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_30

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_30

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_31

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_31

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_32

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_32

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_33

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_33

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_34

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_34

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_35

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_35

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_36

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_36

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_37

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_37

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_38

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_38

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_39

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_39

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_40

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_40

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_41

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_41

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_42

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_42

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_43

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_43

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_44

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_44

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_45

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_45

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_46

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_46

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_47

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_47

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_48

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_48

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_49

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_49

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

sampler_50

• None
• euler
• euler_cfg_pp
• euler_ancestral
• euler_ancestral_cfg_pp
• heun
• heunpp2
• dpm_2
• dpm_2_ancestral
• lms
• dpm_fast
• dpm_adaptive
• dpmpp_2s_ancestral
• dpmpp_sde
• dpmpp_sde_gpu
• dpmpp_2m
• dpmpp_2m_sde
• dpmpp_2m_sde_gpu
• dpmpp_3m_sde
• dpmpp_3m_sde_gpu
• ddpm
• lcm
• ipndm
• ipndm_v
• deis
• ddim
• uni_pc
• uni_pc_bh2

scheduler_50

• None
• normal
• karras
• exponential
• sgm_uniform
• simple
• ddim_uniform
• AYS SD1
• AYS SDXL
• AYS SVD

Outputs

XY

Extension: Efficiency Nodes for ComfyUI Version 2.0+

A collection of ComfyUI custom nodes to help streamline workflows and reduce total node count.[w/NOTE: This node is originally created by LucianoCirino, but the a/original repository is no longer maintained and has been forked by a new maintainer. To use the forked version, you should uninstall the original version and REINSTALL this one.]

Authored by jags111